Endpoint Compliance

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

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2.4 English

When doing PCIECV for PCISIG compliance, the Endpoint drivers on a host system are not installed. Likewise, when using the Zynq UltraScale+ MPSoC as an Endpoint for a PCIECV test, any driver accessing AXI-PCIe bridge registers running on the Zynq UltraScale+ MPSoC (APU or RPU clusters) should not be installed.

If the driver running on the Zynq UltraScale+ MPSoC accesses the AXI-PCIe bridge registers, it can cause the transaction pending bit (in PCIe configuration space) to be set, which would cause a PCIECV compliance failure.