The AXI Master port is capable of driving the AWPROT and ARPROT bits with a programmable value controlled from the TrustZone configuration register, FPD_SLCR_SECURE.slcr_sata. When the [tz_en] bit is set to 1, the TrustZone security for the slave port is determined by the [tz_axidma{0, 1}] bits. A value of 1 indicates TrustZone is enabled for the AHCI interface master port. A value of 0 indicates TrustZone is disabled for the master port.
The value of AWPROT can be independently controlled for the following transfers.
•Status FIS transfers.
•Intermediate data burst of a data transfer.
•Final data burst of a data transfer.
The value of ARPROT can be independently controlled for the following transfers.
•Posting PRD read-address to memory controller.
•Posting header read address to the memory controller
•Posting command FIS read address to memory controller
•Posting data burst read address to the memory controller