The AXI interface from the LPD to PL is assigned a fixed address space of 512 MB in the lower 4 GB address space. It is typically used for LPD to PL communications because it provides a low-latency path from the LPD masters like the RPU and the LPD DMA unit to the PL. The AXI interfaces from the FPD to PL are assigned multiple address ranges.
The comprehensive system-level addresses map is shown in Table: Top-Level System Address Map.
|
Slave Name |
Size |
Start Address |
End Address |
|---|---|---|---|
|
DDR Low |
2 GB |
0x0000_0000 |
0x7FFF_FFFF |
|
M_AXI_HPM0_LPD (LPD_PL) |
512 MB |
0x8000_0000 |
0x9FFF_FFFF |
|
VCU(1) |
64 MB |
0xA000_0000 |
0xA3FF_FFFF |
|
M_AXI_HPM0_FPD (HPM0) interface(1) |
192 MB |
0xA400_0000 |
0xAFFF_FFFF |
|
M_AXI_HPM1_FPD (HPM1) interface |
256 MB |
0xB000_0000 |
0xBFFF_FFFF |
|
Quad-SPI |
512 MB |
0xC000_0000 |
0xDFFF_FFFF |
|
PCIe Low |
256 MB |
0xE000_0000 |
0xEFFF_FFFF |
|
Reserved |
128 MB |
0xF000_0000 |
0xF7FF_FFFF |
|
STM CoreSight |
16 MB |
0xF800_0000 |
0xF8FF_FFFF |
|
APU GIC |
1 MB |
0xF900_0000 |
0xF90F_FFFF |
|
Reserved |
63 MB |
0xF910_0000 |
0xFCFF_FFFF |
|
FPD slaves |
16 MB |
0xFD00_0000 |
0xFDFF_FFFF |
|
Upper LPD slaves |
16 MB |
0xFE00_0000 |
0xFEFF_FFFF |
|
Lower LPD slaves |
12 MB |
0xFF00_0000 |
0xFFBF_FFFF |
|
CSU, PMU, TCM, OCM |
4 MB |
0xFFC0_0000 |
0xFFFF_FFFF |
|
Reserved |
12 GB |
0x0001_0000_0000 |
0x0003_FFFF_FFFF |
|
M_AXI_HPM0_FPD (HPM0) |
4 GB |
0x0004_0000_0000 |
0x0004_FFFF_FFFF |
|
M_AXI_HPM1_FPD (HPM1) |
4 GB |
0x0005_0000_0000 |
0x0005_FFFF_FFFF |
|
PCIe High |
8 GB |
0x0006_0000_0000 |
0x0007_FFFF_FFFF |
|
DDR High |
32 GB |
0x0008_0000_0000 |
0x000F_FFFF_FFFF |
|
M_AXI_HPM0_FPD (HPM0) |
224 GB |
0x0010_0000_0000 |
0x0047_FFFF_FFFF |
|
M_AXI_HPM1_FPD (HPM1) |
224 GB |
0x0048_0000_0000 |
0x007F_FFFF_FFFF |
|
PCIe High |
256 GB |
0x0080_0000_0000 |
0x00BF_FFFF_FFFF |
|
Reserved |
256 GB |
0x00C0_0000_0000 |
0x00FF_FFFF_FFFF |
|
Notes: 1.The VCU is mapped by the design tools to the 64 MB address space listed in Table: Top-Level System Address Map, but it can be configured to another address within an M_AXI_HPMx_FPD address range, if desired. If VCU is not mapped, the M_AXI_HPM0_FPD interface has a 256 MB range. |
|||
As listed in Table: CSU, PMU, TCM, and OCM Address Space, the 4 MB region is further partitioned and set aside for the configuration security unit (CSU: Chapter 11), platform management unit (PMU: Chapter 6), tightly-coupled memory in RPU (RPU: Chapter 4), and on-chip memory (OCM: Chapter 18).
The reserved address regions are listed in Table: Reserved Addresses.