Clock generators are needed for processors, peripherals, interconnect, and other system elements in the LPD, FPD, and PL. The five system PLLs generate high-frequency signals that are used as sources for the several dozen clock generators. Three of the PLL outputs are routed to each clock generator.
The basic and the two special clock generator architectures are as follows:
•APU MPCore (unique).
•DDR memory controller (unique).
•RPU MPCore (basic clock generator with one divider and two clock enables).
•Basic clock generator (with two dividers).
•Basic clock generator (with one divider).