The CoreSight architecture employs the following buses to interact with each other within the debug infrastructure, and with the rest of the PS.
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JTAG |
Four standard JTAG pins (without the optional TRST). These pins are used by debugger tools to interact with the debug infrastructure. |
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ATB |
AMBA trace bus. This bus has 32-bit data and a 7-bit ID, with a ready/valid handshake. The ATB also provides a flush mechanism. |
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Debug APB |
AMBA APB protocol. The DAP controller is the master of this bus. The DAP controller uses this bus to access all other CoreSight components. |
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System APB |
AMBA APB protocol. The DAP is a slave of the system APB bus. It is on the system memory map assigned to this APB bus. |
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AXI |
AMBA AXI protocol. The DAP is the master of this bus. The DAP controller uses the AXI bus to access everything on the system map, subject to authentication. |