There are two I2C controllers in the LPD IOP section of the PS.
•I2C bus specification version 2.
•16-byte FIFO.
•Programmable normal and fast bus data rates.
•Multi-master support.
•Master mode
°Read and write transfers
°Seven and 10-bit addressing.
°Clock stretching by allowing hold for slow processor service.
°[TO] interrupt bit to avoid stall condition.
°Repeated start.
°Slave monitor mode
•Slave mode
°Transmit and receive.
°Fully programmable slave response address.
°[HOLD] bit helps to prevent the overflow condition.
°[TO] bit helps interrupt flag to avoid stall condition.
°Clock stretching helps to delay communication if data is not readily available.
•Software can poll for status or function as interrupt-driven device.
•Programmable interrupt generation.