System Features Assigned by Software

PMU global persistent general storage registers {4:7}

Four registers are used by the FSBL and other AMD software products: PMU_GLOBAL.PERS_GLOB_GEN_STORAGE{4:7}.

PMU global general storage registers {4:6}

Three registers are used by the FSBL and other AMD software products: PMU_GLOBAL.GLOBAL_GEN_STORAGE{4:6}.

PMU general purpose MIO pins

Table: PMU General Purpose MIO Pins provides PMU general purpose MIO pins. Pins are used to control external power supplies.

GPIO signals to reset PL instantiated logic

Four GPIO pins are used by the Vivado process or the configuration wizard (PCW) provides resets through the EMIO to PL fabric.

PMU sleep mode request

The PMU has four IPI interrupts. PMU_0 interrupt is assigned by the PMU firmware to transition the PMU to sleep mode.