Clocking Domain - UG1085

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID
UG1085
Release Date
2023-12-21
Revision
2.4 English

The GPU runs based only on the GPU_REF_CLK clock. All interfaces, including APB and core, are clocked based on the GPU_REF_CLK clock. The values of PLL Source and clock frequency are configured using the GPU_REF_CTRL register. See PS Clock Subsystem for more information on GPU_REF_CLK.