There are several sets of interrupt registers and IPI message buffers that are memory mapped.
•RPU GIC: Arm PL390 with GICv1 interrupt architecture.
•APU GIC: Arm GIC400 with GICv2 interrupt architecture.
•GIC proxy system interrupt controller and AMD PMU interrupt architecture.
•IPI interrupts and AMD processor communications architecture.
•IPI message buffers, 32B x 128 buffers starting at address 0xFF99_0000.
The interrupt register sets are summarized in Table: Interrupt Register Overview.