Processor Communications

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

Document ID: UG1085
Release Date: 2023-12-21
Revision: 2.4 English

Table: Processor Communications lists the processor communications signals. See Table: PL Event Signals in PS-PL AXI Interfaces for additional information.

Table 2-5: Processor Communications
Signal Name	Count	Source	Destination	Description
P2F PMU signal	32 signals	LPD	PL	GPO3 register signals to PL.⁽¹⁾
F2P PMU signal	32 signals	PL	LPD	GPI3 register signals from PL.⁽¹⁾
APU wake up	2 signals	PL	FPD	APU WFE and WFI event and interrupt status.
IRQ_P2F_PL_IPIx	4 channels	LPD	PL	IPI interrupts to PL targets.
IRQ_F2P_PL_IPIx	7 channels	PL	LPD	IPI interrupts to PS targets.
PL IRQs	16 signals	PL	LPD, FPD	IRQ signals from PL to GICs.
RPU CPU IRQs	4 signals	PL	LPD	FIQ, IRQ interrupts for each core.
APU CPU IRQs	8 signals	PL	FPD	FIQ, IRQ interrupts for each core.
PS System IRQs	>100 signals	PS	PL	PS generated interrupts to GICs and PL.
LPD IOP interrupts	100	LPD	PL	From peripherals to GICs and PL. See Table: System Interrupts.
FPD IOP interrupts	64	FPD	PL	From peripherals to GICs and PL. See Table: System Interrupts.
Events	~	LPD, FPD	PL	Events from RPU and APU.
Notes: 1.Software environments might assign meaning to the GPI and GPO signals of the PMU.