Bits
|
Name
|
Description
|
Address
|
[0]
|
IDONE
|
Initialization done: if set, indicates that the DDR system initialization has completed. This bit is set after all the selected initialization routines have completed.
|
0xFD080030
|
[1]
|
PLDONE
|
PLL lock done: if set, indicates that PLL locking has completed.
|
0xFD080030
|
[2]
|
DCDONE
|
Digital delay line (DDL) calibration done: if set, indicates that DDL calibration has completed.
|
0xFD080030
|
[3]
|
ZCDONE
|
Impedance calibration done: if set, indicates that impedance calibration has completed.
|
0xFD080030
|
[4]
|
DIDONE
|
DRAM initialization done: if set, indicates that DRAM initialization has completed.
|
0xFD080030
|
[5]
|
WLDONE
|
Write leveling done: if set, indicates that write leveling has completed.
|
0xFD080030
|
[6]
|
QSGDONE
|
DQS gate training done: if set, indicates that read leveling (DQS Gate Training) has completed.
|
0xFD080030
|
[7]
|
WLADONE
|
Write leveling adjustment done: if set, indicates that write leveling adjustment has completed.
|
0xFD080030
|
[8]
|
RDDONE
|
Read bit deskew done: if set, indicates that read bit deskew has completed.
|
0xFD080030
|
[9]
|
WDDONE
|
Write bit deskew done: if set, indicates that write bit deskew has completed.
|
0xFD080030
|
[10]
|
REDONE
|
Read eye training done: if set, indicates that read eye training has completed.
|
0xFD080030
|
[11]
|
WEDONE
|
Write eye training done: if set, indicates that write eye training has completed.
|
0xFD080030
|
[12]
|
CADONE
|
CA training done: if set, indicates that LPDDR3 CA training has completed.
|
0xFD080030
|
[14]
|
VDONE
|
VREF training done: if set, indicates that DRAM and host VREF training has completed. DDR4 and LPDDR4 only.
|
0xFD080030
|
[15]
|
DQS2DQDONE
|
Write DQS2DQ training done. if set, indicates that write DQS2DQ training has completed. LPDDR4 only.
|
0xFD080030
|
[18]
|
DQS2DQERR
|
Write DQS2DQ training error: if set, indicates that there is an error in DQS2DQ training.
|
0xFD080030
|
[19]
|
VERR
|
VREF training error: if set, indicates that there is an error in VREF training.
|
0xFD080030
|
[20]
|
ZCERR
|
Impedance calibration error: if set, indicates that there is an error in impedance calibration.
|
0xFD080030
|
[21]
|
WLERR
|
Write leveling error: if set, indicates that there is an error in write leveling.
|
0xFD080030
|
[22]
|
QSGERR
|
DQS gate training error: if set, indicates that there is an error in read leveling (DQS Gate Training).
|
0xFD080030
|
[23]
|
WLAERR
|
Write leveling adjustment error: if set, indicates that there is an error in write leveling adjustment.
|
0xFD080030
|
[24]
|
RDERR
|
Read bit deskew error: if set, indicates that there is an error in read bit deskew.
|
0xFD080030
|
[25]
|
WDERR
|
Write bit deskew error: if set, indicates that there is an error in write bit deskew.
|
0xFD080030
|
[26]
|
REERR
|
Read eye training error: if set, indicates that there is an error in read eye training.
|
0xFD080030
|
[27]
|
WEERR
|
Write eye training error: if set, indicates that there is an error in write eye training.
|
0xFD080030
|
[28]
|
CAERR
|
CA training error: if set, indicates that there is an error in LPDDR3 CA training.
|
0xFD080030
|
[29]
|
CAWRN
|
CA training warning: if set, indicates that there is a warning in LPDDR3 CA training.
|
0xFD080030
|
[31]
|
APLOCK
|
AC PLL lock: if set, indicates that the AC PLL has locked.
|
0xFD080030
|