The notable differences between the PS SYSMON and the PL SYSMON are the programming bus interfaces, sampling rates, and analog input signal sources. The differences are listed in Table: PS SYSMON and PL SYSMON Comparison.
|
Function |
PS SYSMON |
PL SYSMON |
|---|---|---|
|
Sampling frequency |
1 M samples per second. |
200K samples per second. |
|
Voltage reference |
Internal. |
Internal or external (VREFP, VREFN). |
|
Programming interfaces |
APB on AXI interconnect. |
APB/AXI interconnect. |
|
Power domain |
LPD. |
PLPD. |
|
Temperature sensors with OT |
Temp_LPD near the RPU MPCore. Temp_FPD near the APU MPCore. |
Temp_PL near the PL SYSMON unit. |
|
On-chip supply sensors |
Three PS internal voltage nodes. |
Three PS internal voltage nodes. |
|
PL external sensor channels |
None. |
16 signal pairs; VAUXP, and VAUXN(2). |
|
PL user inputs |
None. |
Four, full featured. |
|
Event driven trigger |
AMS.PS_SYSMON_CONTROL_STATUS |
CONVST start signal input.(1) |
|
EOS, EOC |
AMS.ISR_1 [eos], [eoc] interrupts. |
EOS, EOC signals to PL fabric.(1) |
|
Reset (see Reset Sources) |
POR, write to VP_VN register, AMS.PS_SYSMON_CONTROL_STATUS. |
RESET pin, write to VP_VN register. |
|
Notes: 1.This function requires the SYSMONE4 primitive to be instantiated by the bitstream for the PL. The instantiation disconnects the PL SYSMON unit from the PS, and provides a slave bus interface and the other system signals for the PL fabric. 2.The VAUXP/VAUXN, and VN/VP analog signals are connected to device pins by instantiating the SYSMONE4 primitive. |
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