In the low-power operation mode, hardware blocks on the low power rail are powered up in the PS block (PMU, RPU, CSU, and the IOP). The low-power mode includes all peripherals except the SATA and display port blocks. Table: Minimum and Typical Configurations for the Low-Power Mode shows the IP enabled in low-power mode.
Table 6-1: Minimum and Typical Configurations for the Low-Power Mode
|
System Elements
|
Typical Minimum Configuration
|
Typical Configuration
Full Optimization
|
Comments
|
|
Cortex-R5F
|
One core @ 50 MHz
|
Two cores @maximum data sheet frequency
|
Clock is gated to the unused core.
|
|
TCM configuration
OCM configuration
|
Powered down
128KB
|
64 KB instruction and 64 KB data
256 KB
|
Power is gated off to the unused TCM banks.
Power is gated off to the unused banks
|
|
Device security
|
Without AES
|
All, including AES
|
|
|
Peripheral
|
One set of UART, I2C, and Ethernet
|
All peripherals in LPS
and one USB 2.0
|
USB can independently be powered down.
|
|
PLLs
|
One PLL
|
Two PLLs
|
PLLs that are not used are in the powered-down state.
|
|
SYSMON
|
Included
|
Included
|
Power is reduced as there are fewer supplies to be sampled.
|
|
RTC and BBRAM
|
Included
|
Included
|
Switched to the VCC_PSAUX rail.
|
|
PMU
SOC debug
|
Included
Standby
|
Included
Standby
|
SOC debug is mostly on the FP rail. The LP section is not used.
|
|
eFuse
Components outside LPD
|
Included
Powered down
|
Included
Powered down
|
|
|
PL
|
Powered down
|
Powered down
|
|