Most of the components in the CoreSight debug logic have only one clock input. Power domain crossings use APB asynchronous bridges, and ATB asynchronous bridges. Table: Clocks lists the JTAG and debug clocks.
Most of the components in the CoreSight debug logic have only one clock input. Power domain crossings use APB asynchronous bridges, and ATB asynchronous bridges. Table: Clocks lists the JTAG and debug clocks.