Task |
SD{0, 1} |
Register Field |
Register Offset |
Bits |
Value |
---|---|---|---|---|---|
Check the present state register to make sure the card is inserted and detected by the host controller. |
reg_presentstate |
sdhccarddet_inserted_dsync |
0x24 |
16 |
Read |
74 clock delay after card is powered up, before the first command. |
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Send CMD0 to card with no response expected (see Table: SD CMD Transfer). |
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Send CMD8 to card with response (0x1AA for supply voltage 2.7–3.6V and AA pattern) expected (see Table: SD CMD Transfer). |
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Read response 0 for CMD8 and decide card version. |
reg_response0 |
command_response |
0x10 |
15:0 |
Read |
Send ACMD41 while card is still busy with power up. |
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Send CMD55 (see Table: SD CMD Transfer). |
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Send ACMD41 0x40300000: host high capacity support and 3.3V window (see Table: SD CMD Transfer). |
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Read response 0 for response with card capacity. |
reg_response0 |
command_response |
0x10 |
15:0 |
Read |
Perform above three steps until OCR ready bit (31st) is set. |
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Send CMD2 for card ID (see Table: SD CMD Transfer). |
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Read card specific data in response. |
reg_response0 |
command_response |
0x10 |
15:0 |
Read |
Read card specific data in response. |
reg_response1 |
command_response |
0x12 |
15:0 |
Read |
Read card specific data in response. |
reg_response2 |
command_response |
0x14 |
15:0 |
Read |
Read card specific data in response. |
reg_response3 |
command_response |
0x16 |
15:0 |
Read |
Send CMD3 and read response until relative card address (upper 16 bits of response) received. |
reg_response0 |
command_response |
0x10 |
15:0 |
Read |
Send CMD9 with relative address received. |
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Read card specific data in response. |
reg_response0 |
command_response |
0x10 |
15:0 |
Read |
Read card specific data in response. |
reg_response1 |
command_response |
0x12 |
15:0 |
Read |
Read card specific data in response. |
reg_response2 |
command_response |
0x14 |
15:0 |
Read |
Read card specific data in response. |
reg_response3 |
command_response |
0x16 |
15:0 |
Read |