System PLL Units

Zynq UltraScale+ Device Technical Reference Manual (UG1085)

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2.4 English

The five system PLLs provide a 750 to 1600 MHz clock to the clock generators. The frequency and jitter specifications for the APLL, DPLL, RPLL, IOPLL, and VPLL system PLLs are in the Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics (DS925) [Ref 2].