•System monitoring °Voltages monitoring °Temperature monitoring °Clock frequency monitoring •Error management °Error management is handled and implemented within the PMU °Errors are signaled as interrupts and mirrored to PL °All hardware and software errors captured in ERROR_STATUS_1 °ERROR_STATUS_2 registers are visible to the PMU, RPU, APU, and PL •Monitoring of activation of common cause failures (CCF) by PMU °MBIST, SCAN, reset, power control •Hang protection °Cleanup of outstanding transactions under partial reset •Meta-stability errors °PS uses redundant flip-flops in selected clock crossings •Aging errors °Large on-chip variation (OCV) margin to account for aging effects