The tasks in Table: Setup Interrupts for Bank 0 GPIO Inputs outline the flow used to enable a falling-edge interrupt for all pins of the GPIO bank 0.
Table 27-9: Setup Interrupts for Bank 0 GPIO Inputs
|
Task
|
Register Name
|
Register Field
|
Register Offset
|
Bits
|
Value
|
|
Write interrupt type
|
gpio.INT_TYPE_0
|
INT_TYPE_0
|
0x21C
|
31:0
|
0000_0000h
|
|
Write interrupt polarity
|
gpio.INT_POLARITY_0
|
INT_POL_0
|
0x220
|
31:0
|
0000_0000h
|
|
Write interrupt any edge sensitivity
|
gpio.INT_ANY_0
|
INT_ON_ANY_0
|
0x224
|
31:0
|
0000_0000h
|
The task in Table: Enable the GPIO Interrupts of Bank 0 outlines the flow used to register the call back handler for the GPIO Bank 0 GIC ID.
Table 27-10: Enable the GPIO Interrupts of Bank 0
|
Task
|
Register Name
|
Register Field
|
Register Offset
|
Bits
|
Value
|
|
Enable interrupts for GPIO bank 0
|
gpio.INT_EN_0
|
INT_ENABLE_0
|
0x210
|
31:0
|
FFFF_FFFFh
|