Table: SPI Modes in Generic Quad-SPI Controller (Lower Data Bus is Active) lists the lower data bus pins driven by the generic Quad-SPI controller as per the SPI mode, receive, and transmit of the lower data bus. Table 24-15: SPI Modes in Generic Quad-SPI Controller (Lower Data Bus is Active) SPI Mode Mode Description Data BusSelect Receive Transmit Lower Data Bus [3:0] I/O 2'b01 SPI transmit. 2'b01 1'b0 1'b1 Not used Not used Not used O 2'b01 SPI receive. 2'b01 1'b1 1'b0 Not used Not used I Not used 2'b01 SPI transmit and receive. 2'b01 1'b1 1'b1 Not used Not used I O 2'b10 Dual-SPI transmit. 2'b01 1'b0 1'b1 Not used Not used O O 2'b10 Dual-SPI receive. 2'b01 1'b1 1'b0 Not used Not used I I 2'b11 Quad-SPI transmit. 2'b01 1'b0 1'b1 O O O O 2'b11 Quad-SPI receive. 2'b01 1'b1 1'b0 I I I I