Table: Virtex Ultrascale Devices Available GT Quads
shows the PCIe lane0 GT Quad options available for the different Virtex
™
Ultrascale™ devices. The GT Quad location is shown using the GT Quad bank number rather than GT XY coordinates. The
UltraScale and UltraScale+ FPGAs Packaging and Pinouts Product Specification User Guide (UG575)
[Ref 11]
provides a diagram describing the PCIe block locations relative to enabled GT Quads and includes both GT bank numbering and XY coordinates if needed.
Note:
The selections in bold are the GT Quad defaults for a given device, package, and PCIe block.
Table B-1:
Virtex Ultrascale Devices Available GT Quads
|
Device
|
Package
|
PCIe Blocks
|
Quads with Max Link Width X8 Support
|
Quads with Max Link Width X4 Support
|
|
XCVU065
|
FFVC1517
|
X0Y0
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y1
|
GTH_Quad_228
|
GTH_Quad_227
|
|
XCVU080
|
FFVC1517
|
X0Y0
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y1
|
GTH_Quad_228
|
GTH_Quad_227
|
|
X0Y2
|
X8 Not Supported
|
GTH_Quad_228
|
|
X0Y3
|
X8 Not Supported
|
GTH_Quad_228
|
|
XCVU080
cont.
|
FFVA2104
|
X0Y0
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y1
|
GTH_Quad_229,
GTH_Quad_228
|
GTH_Quad_227
|
|
X0Y2
|
GTH_Quad_230,
GTH_Quad_229
|
GTH_Quad_228
|
|
X0Y3
|
GTH_Quad_230
|
GTH_Quad_229
|
|
FFVB2104
|
X0Y0
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y1
|
GTH_Quad_229,
GTH_Quad_228
|
GTH_Quad_227
|
|
X0Y2
|
GTH_Quad_230,
GTH_Quad_229
|
GTH_Quad_228
|
|
X0Y3
|
GTH_Quad_231
|
GTH_Quad_230
|
|
FFVB1760
|
X0Y0
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y1
|
GTH_Quad_229,
GTH_Quad_228
|
GTH_Quad_227
|
|
X0Y2
|
GTH_Quad_230,
GTH_Quad_229
|
GTH_Quad_228
|
|
X0Y3
|
GTH_Quad_231
|
GTH_Quad_230
|
|
FFVD1517
|
X0Y0
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y1
|
GTH_Quad_229,
GTH_Quad_228
|
GTH_Quad_227
|
|
X0Y2
|
GTH_Quad_230,
GTH_Quad_229
|
GTH_Quad_228
|
|
X0Y3
|
GTH_Quad_231
|
GTH_Quad_230
|
|
XCVU095
|
FFVC1517
|
X0Y0
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y1
|
GTH_Quad_228
|
GTH_Quad_227
|
|
X0Y2
|
X8 Not Supported
|
GTH_Quad_228
|
|
X0Y3
|
X8 Not Supported
|
GTH_Quad_228
|
|
FFVA2104
|
X0Y0
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y1
|
GTH_Quad_229,
GTH_Quad_228
|
GTH_Quad_227
|
|
X0Y2
|
GTH_Quad_230,
GTH_Quad_229
|
GTH_Quad_228
|
|
X0Y3
|
GTH_Quad_230
|
GTH_Quad_229
|
|
XCVU095
cont.
|
FFVB2104
|
X0Y0
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y1
|
GTH_Quad_229,
GTH_Quad_228
|
GTH_Quad_227
|
|
X0Y2
|
GTH_Quad_230,
GTH_Quad_229
|
GTH_Quad_228
|
|
X0Y3
|
GTH_Quad_231
|
GTH_Quad_230
|
|
FFVB1760
|
X0Y0
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y1
|
GTH_Quad_229,
GTH_Quad_228
|
GTH_Quad_227
|
|
X0Y2
|
GTH_Quad_230,
GTH_Quad_229
|
GTH_Quad_228
|
|
X0Y3
|
GTH_Quad_231
|
GTH_Quad_230
|
|
FFVC2104
|
X0Y0
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y1
|
GTH_Quad_229,
GTH_Quad_228
|
GTH_Quad_227
|
|
X0Y2
|
GTH_Quad_230,
GTH_Quad_229
|
GTH_Quad_228
|
|
X0Y3
|
GTH_Quad_231
|
GTH_Quad_230
|
|
FFVD1517
|
X0Y0
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y1
|
GTH_Quad_229,
GTH_Quad_228
|
GTH_Quad_227
|
|
X0Y2
|
GTH_Quad_230,
GTH_Quad_229
|
GTH_Quad_228
|
|
X0Y3
|
GTH_Quad_231
|
GTH_Quad_230
|
|
XCVU125
|
FLVB1760
|
X0Y0
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y1
|
GTH_Quad_228
|
GTH_Quad_227
|
|
X0Y2
|
X8 Not Supported
|
GTH_Quad_230
|
|
X0Y3
|
GTH_Quad_233
|
GTH_Quad_232
|
|
FLVB2104
|
X0Y0
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y1
|
GTH_Quad_228
|
GTH_Quad_227
|
|
X0Y2
|
GTH_Quad_230
|
GTH_Quad_229
|
|
X0Y3
|
GTH_Quad_233
|
GTH_Quad_232
|
|
FLVC2104
|
X0Y0
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y1
|
GTH_Quad_228
|
GTH_Quad_227
|
|
X0Y2
|
GTH_Quad_230
|
GTH_Quad_229
|
|
X0Y3
|
GTH_Quad_233
|
GTH_Quad_232
|
|
XCVU125
cont.
|
FLVA2104
|
X0Y0
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y1
|
X8 Not Supported
|
GTH_Quad_227
|
|
X0Y2
|
X8 Not Supported
|
GTH_Quad_231
|
|
X0Y3
|
GTH_Quad_233
|
GTH_Quad_232
|
|
FLVD1517
|
X0Y0
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y1
|
GTH_Quad_228
|
GTH_Quad_227
|
|
X0Y2
|
GTH_Quad_230
|
GTH_Quad_229
|
|
X0Y3
|
GTH_Quad_233
|
GTH_Quad_232
|
|
XCVU160
|
FLGB2104
|
X0Y1
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y2
|
GTH_Quad_228
|
GTH_Quad_227
|
|
X0Y3
|
GTH_Quad_230
|
GTH_Quad_229
|
|
X0Y4
|
GTH_Quad_233
|
GTH_Quad_232
|
|
FLGC2104
|
X0Y0
|
X8 Not Supported
|
GTH_Quad_222
|
|
X0Y1
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y2
|
GTH_Quad_228
|
GTH_Quad_227
|
|
X0Y3
|
GTH_Quad_230
|
GTH_Quad_229
|
|
X0Y4
|
GTH_Quad_233
|
GTH_Quad_232
|
|
XCVU190
|
FLGA2577
|
X0Y0
|
GTH_Quad_220
|
GTH_Quad_219
|
|
X0Y1
|
GTH_Quad_223
|
GTH_Quad_222
|
|
X0Y2
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y3
|
GTH_Quad_228
|
GTH_Quad_227
|
|
X0Y4
|
GTH_Quad_230
|
GTH_Quad_229
|
|
X0Y5
|
GTH_Quad_233
|
GTH_Quad_232
|
|
FLGB2104
|
X0Y2
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y3
|
GTH_Quad_228
|
GTH_Quad_227
|
|
X0Y4
|
GTH_Quad_230
|
GTH_Quad_229
|
|
X0Y5
|
GTH_Quad_233
|
GTH_Quad_232
|
|
FLGC2104
|
X0Y0
|
X8 Not Supported
|
GTH_Quad_220
|
|
X0Y1
|
X8 Not Supported
|
GTH_Quad_222
|
|
X0Y2
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y3
|
GTH_Quad_228
|
GTH_Quad_227
|
|
X0Y4
|
GTH_Quad_230
|
GTH_Quad_229
|
|
X0Y5
|
GTH_Quad_233
|
GTH_Quad_232
|
|
XCVU440
|
FLGA2892
|
X0Y0
|
GTH_Quad_220
|
GTH_Quad_219
|
|
X0Y1
|
X8 Not Supported
|
GTH_Quad_222
|
|
X0Y2
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y3
|
X8 Not Supported
|
GTH_Quad_227
|
|
X0Y4
|
GTH_Quad_230
|
GTH_Quad_229
|
|
X0Y5
|
X8 Not Supported
|
GTH_Quad_232
|
|
FLGB2377
|
X0Y0
|
X8 Not Supported
|
GTH_Quad_221
|
|
X0Y1
|
GTH_Quad_223
|
GTH_Quad_222
|
|
X0Y2
|
GTH_Quad_225
|
GTH_Quad_224
|
|
X0Y3
|
X8 Not Supported
|
GTH_Quad_226
|
|
X0Y4
|
X8 Not Supported
|
GTH_Quad_231
|
|
X0Y5
|
GTH_Quad_233
|
GTH_Quad_232
|
|
Notes:
1.
The GT quads highlighted in bold are the default GT quads for a given device, package, and PCIe block.
|