MSI Capabilities - 4.4 English - PG156

UltraScale Devices Gen3 Integrated Block for PCI Express LogiCORE IP Product Guide (PG156)

Document ID
PG156
Release Date
2024-12-06
Version
4.4 English
PF0/PF1 Enable MSI Capability Structure
Indicates that the MSI Capability structure exists.
Note: Although it is possible to not enable MSI or MSI-X, the result would be a non-compliant core. The PCI Express Base Specification requires that MSI, MSI-X, or both be enabled.
Multiple Message Capable
Selects the number of MSI vectors to request from the Root Complex.