Completer Request (CQ) Interface - 4.4 English - PG156

UltraScale Devices Gen3 Integrated Block for PCI Express LogiCORE IP Product Guide (PG156)

Document ID
PG156
Release Date
2024-12-06
Version
4.4 English
Table 1. Signal mapping of AXI-4 ST Basic Receive Interface to AXI4-ST Enhanced CQ Interface
AXI4-Stream (Basic) Receive Interface Name AXI4-Stream (Enhanced) CQ Interface Name Differences
m_axis_rx_tlast m_axis_cq_tlast None

m_axis_rx_tdata

(64/128)

m_axis_cq_tdata

(64/128/256)

None
m_axis_rx_tvalid m_axis_cq_tvalid None
m_axis_rx_tready m_axis_cq_tready None
m_axis_rx_tstrb

m_axis_cq_tkeep and

m_axis_cq_tuser

See m_axis_rx_tstrb (64-Bit Interface Only)
m_axis_rx_tuser

m_axis_cq_tuser and

m_axis_cq_tdata (Descriptor)

See m_axis_rx_tuser
rx_np_ok No equivalent signal N/A
rx_np_req pcie_cq_np_req None
No equivalent signal pcie_cq_np_req_count N/A