Other Interfaces - 4.4 English

UltraScale Devices Gen3 Integrated Block for PCI Express LogiCORE IP Product Guide (PG156)

Document ID
PG156
Release Date
2023-11-24
Version
4.4 English

Table: Additional Interfaces Provided by the Core describes additional interfaces provided by the core.

Table A-17: Additional Interfaces Provided by the Core

Interfaces

Description

Notes

Transmit Flow
Control

Used by the user application to request which flow control information the core provides.

Based on the setting flow control input to the core, this interface provides the following to the user application:

Posted/Non-Posted Header Flow Control Credits

Posted/Non-Posted Data Flow Control Credits

Completion Header Flow Control Credits

Completion Data Flow Control Credits

Similar functionality

Configuration
Management

Used to read and write to the Configuration Space registers.

Similar functionality

Configuration
Status

Provides information about how the core is configured, such as the negotiated link width and speed, the power state of the core, and configuration errors.

Similar functionality as Configuration Specific register ports

Configuration
Received Message

Indicates the logic of a decodable message from the link, the parameters associated with the data, and the type of message received

Similar functionality as Received Message TLP status ports

Configuration
Transmit Message

Used by the user application to transmit messages to the core. The user application supplies the transmit message type and data information to the core, which responds with the Done signal.

Per Function
Status

Provides status data requested by the user application through the selected function.

Similar functionality as Error Reporting Ports

Configuration
Control

Allows information exchange between the user application and the core. The user application uses this interface to:

set the configuration space

indicate if a correctable or uncorrectable error has occurred

set the device serial number

set the Downstream Bus, Device, and Function Number

receive per-function configuration information.

This interface also provides handshaking between the user application and the core when a Power State change or function level reset occurs.

Similar functionality as the Power Management Port

Configuration
Interrupt Controller

Allows the user application to set Legacy PCIe interrupts, MSI interrupts, or MSI-X interrupts. The core provides the interrupt status on the configuration interrupt sent and fail signals.

Similar functionality as Interrupt Generation and Status Ports

Configuration
Extended

Allows the core to transfer configuration information with the user application when externally implemented configuration registers are implemented.

Similar functionality as Received Configuration TLP Status Ports