Link Training: 2-Lane, 4-Lane, and 8-Lane Components - 4.4 English - PG156

UltraScale Devices Gen3 Integrated Block for PCI Express LogiCORE IP Product Guide (PG156)

Document ID
PG156
Release Date
2024-12-06
Version
4.4 English

The 2-lane, 4-lane, and 8-lane core can operate at less than the maximum lane width as required by the PCI Express Base Specification. Two cases cause core to operate at less than its specified maximum lane width, as defined in these subsections.