The Configuration Received Message interface indicates to the logic that a decodable message from the link, the parameters associated with the data, and the type of message have been received. Table: Configuration Received Message Interface Port Descriptions defines the ports in the Configuration Received Message interface of the core.
Port |
Direction |
Width |
Description |
---|---|---|---|
cfg_msg_received |
Output |
1 |
Configuration Received a Decodable Message. The core asserts this output for one or more consecutive clock cycles when it has received a decodable message from the link. The duration of its assertion is determined by the type of message. The core transfers any parameters associated with the message on the cfg_msg_data[7:0]output in one or more cycles when cfg_msg_received is High. Table: Message Parameters on Receive Message Interface lists the number of cycles of cfg_msg_received assertion, and the parameters transferred on cfg_msg_data[7:0] in each cycle, for each type of message. The core inserts at least a one-cycle gap between two consecutive messages delivered on this interface when the cfg_msg_received interface is enabled. The Configuration Received Message interface must be enabled during core configuration in the Vivado IDE. |
cfg_msg_received_data |
Output |
8 |
This bus is used to transfer any parameters associated with the Received Message. The information it carries in each cycle for various message types is listed in Table: Message Parameters on Receive Message Interface . |
cfg_msg_received_type |
Output |
5 |
Received message type. When cfg_msg_received is High, these five bits indicate the type of message being signaled by the core. The various message types are listed in Table: Message Type Encoding on Receive Message Interface . |