Supported Devices - 4.4 English

UltraScale Devices Gen3 Integrated Block for PCI Express LogiCORE IP Product Guide (PG156)

Document ID

PG156

Release Date

2023-11-24

Version

4.4 English

The UltraScale Devices Gen3 Integrated Block for PCIe core and Vivado tool flow support implementations targeting AMD reference boards and specific part/package combinations.

Tandem Configuration is available as a production solution for all UltraScale production devices. Bitstream generation is disabled by default for all ES silicon. Tandem Configuration supports the configurations found in Table: Tandem PROM/PCIe Supported Configurations .

Table 3-2: Tandem PROM/PCIe Supported Configurations
HDL	Verilog Only
PCIe Configuration	All configurations (max: X8Gen3)
AMD Reference Board Support	KCU105 Evaluation Board for Kintex UltraScale FPGA VCU108 Evaluation Board for Virtex UltraScale FPGA
Device Support	Part ⁽¹⁾	PCIe Block Location	PCIe Reset Location	Tandem Configuration	Tandem with Field Updates
Kintex UltraScale	XCKU025	PCIE_3_1_X0Y0	IOB_X1Y103	Production	Production
	XCKU035	PCIE_3_1_X0Y0	IOB_X1Y103	Production	Production
	XCKU040	PCIE_3_1_X0Y0	IOB_X1Y103	Production	Production
	XCKU060	PCIE_3_1_X0Y0	IOB_X2Y103	Production	Production
	XCKU085	PCIE_3_1_X0Y0	IOB_X2Y103	Production	Production
	XCKU095	PCIE_3_1_X0Y0	IOB_X1Y103	Production	Production
	XCKU115	PCIE_3_1_X0Y0	IOB_X2Y103	Production	Production
Virtex UltraScale	XCVU065	PCIE_3_1_X0Y0	IOB_X1Y103	Production	Production
	XCVU080	PCIE_3_1_X0Y0	IOB_X1Y103	Production	Production
	XCVU095	PCIE_3_1_X0Y0	IOB_X1Y103	Production	Production
	XCVU125	PCIE_3_1_X0Y0	IOB_X1Y103	Production	Production
	XCVU160	PCIE_3_1_X0Y1	IOB_X1Y363	Production	Production
	XCVU190	PCIE_3_1_X0Y2	IOB_X1Y363	Production	Production
	XCVU440	PCIE_3_1_X0Y2	IOB_X1Y363	Production	Production
Notes: 1. Only production silicon is officially supported. Bitstream generation is disabled for all engineering sample silicon (ES1 and ES2) devices.