Physical Layer Interface - 4.4 English - PG156

UltraScale Devices Gen3 Integrated Block for PCI Express LogiCORE IP Product Guide (PG156)

Document ID
PG156
Release Date
2024-12-06
Version
4.4 English

The Physical Layer (PL) Interface parameter is set to false by default (unchecked), so these ports do not appear at the core boundary. To enable these ports, turn on this parameter.

  • pl_eq_in_progress
  • pl_eq_phase
  • pl_eq_reset_eieos_count
  • pl_gen2_upstream_prefer_deemph