Post-Synthesis Netlist Functional Simulation - 4.4 English

UltraScale Devices Gen3 Integrated Block for PCI Express LogiCORE IP Product Guide (PG156)

Document ID
PG156
Release Date
2023-11-24
Version
4.4 English

To run a post-synthesis netlist functional simulation:

1. Generate the core with required configuration

2. Open the example design and run Synthesis

3. After synthesis is completed, in the Flow Navigator, right-click the Run Simulation option and select Run Post-Synthesis Functional Simulation .