Generating the Core - 4.4 English

To generate a core using the default values in the Vivado IDE, follow these steps:

1. Start the Vivado IP catalog.
2. Select File > Project > New .
3. Enter a project name and location, then click Next. This example uses project_name.xpr and project_dir.
4. In the New Project wizard pages, do not add sources, existing IP, or constraints.
5. From the Part tab in the following figure, select these options:
   • Family: Kintex AMD UltraScale™
   • Device: xcku040
   • Package: ffva1156
   • Speed Grade: -3
   Note: If an unsupported silicon device is selected, the core is grayed out (unavailable) in the list of cores.
   
   
   
6. In the final project summary page, click OK.
7. In the Vivado IP catalog, expand Standard Bus Interfaces > PCI Express, and double-click the UltraScale Devices Gen3 Integrated Block for PCIe core to display the Customize IP dialog box.
8. In the Component Name field, enter a name for the core.
   Note: <component_name> is used in this example.
   
   
   
9. From the Device/Port Type drop-down menu, select the appropriate device/port type of the core (Endpoint or Root Port).
10. Click OK to generate the core using the default parameters.