The PCI Express® Base Specification [Ref 2] requires all Endpoints to advertise infinite Flow Control credits for received Completions to their link partners. This means that an Endpoint must only transmit Non-Posted Requests for which it has space to accept Completion responses. This appendix describes how a user application can manage the receive-buffer space in the UltraScale Devices Gen3 Integrated Block for PCIe core to fulfill this requirement.