Overview - 4.4 English - PG156

UltraScale Devices Gen3 Integrated Block for PCI Express LogiCORE IP Product Guide (PG156)

Document ID
PG156
Release Date
2024-12-06
Version
4.4 English

The main components that enable XVC-over-PCIe debug are as follows:

  • Host PC XVC-Server application
  • Host PC PCIe-XVC driver
  • XVC-over-PCIe enabled FPGA design

These components are provided as a reference on how to create XVC connectivity for AMD FPGA designs. These three components are shown in the following figure and connect to the Vivado Design Suite debug feature through a TCP/IP socket.

Figure 1. XVC-over-PCIe Software and Hardware Components