PCIe Block Location - 4.4 English - PG156

UltraScale Devices Gen3 Integrated Block for PCI Express LogiCORE IP Product Guide (PG156)

Document ID
PG156
Release Date
2024-12-06
Version
4.4 English

Selects from the available integrated blocks to enable generation of location-specific constraint files and pinouts. This selection is used in the default example design scripts.

This option is not available if an AMD Development Board is selected.