(Only available when Gen2 link speed is selected), allows for either the QPLL1 or CPLL to be selected as the clock source. This feature is useful when additional protocols are desired to be in the same GT Quad when operating at Gen2 links speeds. Gen3 speeds require the QPLL1, and Gen1 speeds always use the CPLL.
Important: The rest of the settings should not be modified
unless instructed to do so by AMD.
The following table shows the options and default for each line speed.
| Link Speed | PLL Type | Comments |
|---|---|---|
| 2.5_GT/s | CPLL | The default is CPLL, and not available for selection. |
| 5.0_GT/s | QPLL1, CPLL | The default is QPLL1, and available for selection. |
| 8.0_GT/s | QPLL1 | The default is QPLL1, and not available for selection. |