xmpu_lock (DDRMC_NOC) Register Description
| Register Name | xmpu_lock |
|---|---|
| Offset Address | 0x0000010020 |
| Absolute Address |
This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507. |
| Width | 1 |
| Type | rwsoRead/write, set only |
| Reset Value | 0x00000000 |
| Description | Write Protect Register |
xmpu_lock (DDRMC_NOC) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| prot | 0 | rwsoRead/write, set only | 0x0 | This register is used to disable write access to some other registers. When set to 0x1, the following registers are locked: xmpu_ctrl, xmpu_start_lo*, xmpu_start_hi*, xmpu_end_lo*, xmpu_end_hi*, xmpu_master*, and xmpu_config*. This is a read-write set only registers. Once set, it cannot be cleared until reset. |