HBMMC_NA0_NA_RESP_CTRL_PAR_ERR_LOG_EHP16 (HBMMC_NA0) Register Description
| Register Name | HBMMC_NA0_NA_RESP_CTRL_PAR_ERR_LOG_EHP16 |
|---|---|
| Offset Address | 0x00000001E4 |
| Absolute Address |
This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507. |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Parity Error in either the BRESP or the RRESP Control signals |
HBMMC_NA0_NA_RESP_CTRL_PAR_ERR_LOG_EHP16 (HBMMC_NA0) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| PORT1 | 22 | rwNormal read/write | 0x0 | If set indicates that error occurred on NPP Port1, else error occurred on Port0 |
| WRITE | 21 | rwNormal read/write | 0x0 | WRITE bit set implies error is on BRESP FIFO. WRITE bit 0 implies error is on RRESP FIFO. |
| TAG | 20:13 | rwNormal read/write | 0x0 | Logs the TAG of the transaction |
| SRC_ID | 12:1 | rwNormal read/write | 0x0 | Logs the SOURCE ID of the transaction |
| ERR_VALID | 0 | rwNormal read/write | 0x0 | If set indicates a parity error in either BRESP or the RRESP control signals |