REG_TBASE_AXI_TIMEOUT (NOC_NMU) Register

NoC and Integrated Memory Controller NPI Register Reference (AM019)

Document ID
AM019
Release Date
2023-11-17
Revision
1.1

REG_TBASE_AXI_TIMEOUT (NOC_NMU) Register Description

Register NameREG_TBASE_AXI_TIMEOUT
Offset Address0x0000000868
Absolute Address This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507.
Width32
TyperwNormal read/write
Reset Value0x00000001
DescriptionTimebase select for AXI b/r ready

REG_TBASE_AXI_TIMEOUT (NOC_NMU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
en 3rwNormal read/write0x00-disable axi interface timeout
index 2:0rwNormal read/write0x1timebase selection index for rd/wr AXI ready timeout (0-5) (ready/bready)