reg_qos_timeout1 (DDRMC_NOC) Register

NoC and Integrated Memory Controller NPI Register Reference (AM019)

Document ID
AM019
Release Date
2023-11-17
Revision
1.1

reg_qos_timeout1 (DDRMC_NOC) Register Description

Register Namereg_qos_timeout1
Offset Address0x0000000450
Absolute Address This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507.
Width32
TyperwNormal read/write
Reset Value0xFFFFFFFF
DescriptionQoS Starvation

reg_qos_timeout1 (DDRMC_NOC) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
isow_timeout31:24rwNormal read/write0xFFIsoch Write starvation time in NoC clock cycles with QoS Timeout Scale Factor set to 0x0.
See reg_qos_timeout0.isw_scale description for scaling options.
ber_timeout23:16rwNormal read/write0xFFBest Effort Read starvation time in NoC clock cycles with QoS Timeout Scale Factor set to 0x0.
See reg_qos_timeout0.ber_scale description for scaling options.
isor_timeout15:8rwNormal read/write0xFFIsoch Read starvation time in NoC clock cycles with QoS Timeout Scale Factor set to 0x0.
See reg_qos_timeout0.isr_scale description for scaling options.
llr_timeout 7:0rwNormal read/write0xFFLow Latency Read starvation time in NoC clock cycles with QoS Timeout Scale Factor set to 0x0.
See reg_qos_timeout0.llr_scale description for scaling options.