REG_IMR0 (NOC_NCRB) Register

NoC and Integrated Memory Controller NPI Register Reference (AM019)

Document ID: AM019
Release Date: 2023-11-17
Revision: 1.1

REG_IMR0 (NOC_NCRB) Register Description

Register Name	REG_IMR0
Offset Address	0x0000000048
Absolute Address	This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507.
Width	32
Type	roRead-only
Reset Value	0x1E033303
Description	Interrupt Mask Register for intrN. This is a read-only location and can be atomically altered by either the IDR or the IER.

REG_IMR0 (NOC_NCRB) Register Bit-Field Summary

Field Name	Bits	Type	Reset Value	Description
P1_R2W_EB_CAL_ERR	28	roRead-only	0x1	See REG_ISR for description
P1_W2R_EB_CAL_ERR	27	roRead-only	0x1	See REG_ISR for description
P0_R2W_EB_CAL_ERR	26	roRead-only	0x1	See REG_ISR for description
P0_W2R_EB_CAL_ERR	25	roRead-only	0x1	See REG_ISR for description
SCAN_CLR_ERR	20	roRead-only	0x0	See REG_ISR for description
P1_BUF_OVF_ERR	17	roRead-only	0x1	See REG_ISR for description
P0_BUF_OVF_ERR	16	roRead-only	0x1	See REG_ISR for description
P1_CRDT_OVF_ERR	13	roRead-only	0x1	See REG_ISR for description
P0_CRDT_OVF_ERR	12	roRead-only	0x1	See REG_ISR for description
P1_CRDT_RDY_ERR	9	roRead-only	0x1	See REG_ISR for description
P0_CRDT_RDY_ERR	8	roRead-only	0x1	See REG_ISR for description
P1_PARITY_ERR	1	roRead-only	0x1	See REG_ISR for description
P0_PARITY_ERR	0	roRead-only	0x1	See REG_ISR for description