eccr1_corr_err_add_lo (DDRMC_MAIN) Register Description
| Register Name | eccr1_corr_err_add_lo |
|---|---|
| Offset Address | 0x00000010F8 |
| Absolute Address |
This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507. |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Correctable ECC error address lower for DDRMC sub-channel 1 |
eccr1_corr_err_add_lo (DDRMC_MAIN) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| ecc_err_add_lo | 31:0 | rwNormal read/write | 0x0 | Bits [31:0] of address corresponding to error indicated by eccr1_corr_err_status bits. See eccr0_corr_err_add_lo for details. |