DDRMC_UB_IER1 (DDRMC_UB) Register Description
| Register Name | DDRMC_UB_IER1 |
|---|---|
| Offset Address | 0x0000000118 |
| Absolute Address |
This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507. |
| Width | 32 |
| Type | woWrite-only |
| Reset Value | 0x00000000 |
| Description | Interrupt Enable Register. A write of to this location will unmask the interrupt. |
DDRMC_UB_IER1 (DDRMC_UB) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| watchdog_err | 3 | woWrite-only | 0x0 | Microblaze HW Error to PMC 0: No Watchdog timeout error seen 1: Watchdog timeout error seen |
| vt_track_err | 2 | woWrite-only | 0x0 | Microblaze Error to PMC 0: No VT Tracking errors 1: VT Tracking or similar error is seen during mission mode |
| data_ue | 1 | woWrite-only | 0x0 | Microblaze Instruction RAM 0: No ECC errors seen 1: Uncorrectable error has been seen. Microblaze processing cant be trusted, should be interrupt to the PMC |
| instr_ue | 0 | woWrite-only | 0x0 | Microblaze Instruction RAM 0: No ECC errors seen 1: Uncorrectable error has been seen. Microblaze processing cant be trusted, should be interrupt to the PMC |