REG_IDR3 (NOC_NSU) Register

NoC and Integrated Memory Controller NPI Register Reference (AM019)
Document ID
AM019
Release Date
2023-11-17
Revision
1.1

REG_IDR3 (NOC_NSU) Register Description

Register NameREG_IDR3
Offset Address0x0000000074
Absolute Address This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507.
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionInterrupt Disable Register. A write of one to this location will mask the interrupt. (IMR: 1)

REG_IDR3 (NOC_NSU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
scan_clr_err21woWrite-only0x0Scan clear error
wpoison_wr20woWrite-only0x0wpoison detection from NPP packet
addr_par_wr19woWrite-only0x0address parity errors (write)
timeout_wr18woWrite-only0x0various timeout errors (write)
ecc_1bit_wr17woWrite-only0x0ECC 1-bit error, correctable (write)
ecc_2bit_wr16woWrite-only0x0ECC 2-bit error, not correctable (write)
npp_in_wr15woWrite-only0x0NPP and VC map in errors (write)
xlx_infos_wr14woWrite-only0x0AXI IF Xilinx rule violation non-fatal (write)
xlx_rules_wr13woWrite-only0x0AXI IF Xilinx rule violation fatal (write)
axi_rules_wr12woWrite-only0x0AXI IF AXI rule violation (write)
vc_credit_tx11woWrite-only0x0VC map out credit overflow (net received credits are >15)
vc_credit_rx10woWrite-only0x0VC map in credit underflow (response flits received is more than the credits sent out)
unexpected 9woWrite-only0x0unexpected behavior - unexpected packet in the channel
data_par_rd 8woWrite-only0x0data parity errors (read)
addr_par_rd 7woWrite-only0x0address parity errors (read)
timeout_rd 6woWrite-only0x0various timeout errors (read)
ecc_1bit_rd 5woWrite-only0x0ECC 1-bit error, correctable (read)
ecc_2bit_rd 4woWrite-only0x0ECC 2-bit error, not correctable (read)
npp_in_rd 3woWrite-only0x0NPP and VC map in errors (read)
xlx_infos_rd 2woWrite-only0x0AXI IF Xilinx rule violation non-fatal (read)
xlx_rules_rd 1woWrite-only0x0AXI IF Xilinx rule violation fatal (read)
axi_rules_rd 0woWrite-only0x0AXI IF AXI rule violation (read)