REG_1ST_ERR_INFO_1 (NOC_NMU) Register

NoC and Integrated Memory Controller NPI Register Reference (AM019)

Document ID
AM019
Release Date
2023-11-17
Revision
1.1

REG_1ST_ERR_INFO_1 (NOC_NMU) Register Description

Register NameREG_1ST_ERR_INFO_1
Offset Address0x000000081C
Absolute Address This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507.
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionNoC First Error Information

REG_1ST_ERR_INFO_1 (NOC_NMU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
last24roRead-only0x0indicate NPP pkt last
wstrb23:8roRead-only0x0Flit write strobe
pri 7roRead-only0x0flit priority
dst_par 6roRead-only0x0destination parity
misc_ctrl 5:4roRead-only0x0AXI response
pkt_type 3:0roRead-only0x0Error packet type