ecc_err_inj_nsu0 (DDRMC_NOC) Register Description
Register Name | ecc_err_inj_nsu0 |
---|---|
Offset Address | 0x00000006B8 |
Absolute Address |
This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507. |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Flips corresponding egress ECC and/or parity bit. |
ecc_err_inj_nsu0 (DDRMC_NOC) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
persistent | 24 | rwNormal read/write | 0x0 | 0: Inject one error only 1: Inject error persistently |
dst_par_done_wr | 23 | rwNormal read/write | 0x0 | HW will set this bit when one error is injected in non-persistent mode. In persistent mode HW will also set this bit to indicate one or more errors have been injected. |
dst_par_en_wr | 22 | rwNormal read/write | 0x0 | Error injection enable: SW should clear EN and DONE before setting EN again to enable another single injection in non-persistent mode. In persistent mode errors are injected whenever EN is set. 0: Injection disabled 1: Injection enabled |
dst_par_done_rd | 21 | rwNormal read/write | 0x0 | HW will set this bit when one error is injected in non-persistent mode. In persistent mode HW will also set this bit to indicate one or more errors have been injected. |
dst_par_en_rd | 20 | rwNormal read/write | 0x0 | Error injection enable: SW should clear EN and DONE before setting EN again to enable another single injection in non-persistent mode. In persistent mode errors are injected whenever EN is set. 0 - Injection disabled 1 - Injection enabled |
ecc_done_wr | 19 | rwNormal read/write | 0x0 | HW will set this bit when one error is injected in non-persistent mode. In persistent mode HW will also set this bit to indicate one or more errors have been injected. |
ecc_en_wr | 18 | rwNormal read/write | 0x0 | Error injection enable: SW should clear EN and DONE before setting EN again to enable another single injection in non-persistent mode. In persistent mode errors are injected whenever EN is set. 0: Injection disabled 1: Injection enabled |
ecc_done_rd | 17 | rwNormal read/write | 0x0 | HW will set this bit when one error is injected in non-persistent mode. In persistent mode HW will also set this bit to indicate one or more errors have been injected. |
ecc_en_rd | 16 | rwNormal read/write | 0x0 | Error injection enable: SW should clear EN and DONE before setting EN again to enable another single injection in non-persistent mode. In persistent mode errors are injected whenever EN is set. 0: Injection disabled 1: Injection enabled |
ecc_bit_1 | 15:8 | rwNormal read/write | 0x0 | error injection bit position for NPP packet. For 1 bit ECC error, this field should be same as ecc_bit_0. Valid from 0 to 181 |
ecc_bit_0 | 7:0 | rwNormal read/write | 0x0 | error injection bit position for NPP packet. Valid from 0 to 181. |