F0_RDDQ_NQTR_LEFT_16 (DDRMC_DDR4_XRAM) Register Description
| Register Name | F0_RDDQ_NQTR_LEFT_16 |
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| Offset Address | 0x0000003224 |
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| Absolute Address |
This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507.
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| Width | 32 |
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| Type | roRead-only |
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| Reset Value | 0x00000000 |
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| Description | RDDQ Falling Edge Left |
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Read DQ Centering calibration stage: Left edge of valid window for the falling edge clock. Permuted by nibbles.
F0_RDDQ_NQTR_LEFT_16 (DDRMC_DDR4_XRAM) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| Value | 8:0 | roRead-only | 0x0 | RDDQ Falling Edge Left |