HBMMC_CONFIG (HBMMC_MC) Register Description
| Register Name | HBMMC_CONFIG |
|---|---|
| Offset Address | 0x0000000118 |
| Absolute Address |
This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507. |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00002001 |
| Description | HBM Memory Configuration |
HBMMC_CONFIG (HBMMC_MC) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| BANK_CNT | 13:8 | rwNormal read/write | 0x20 | Number of active banks 8 HIGH Stack - set to 32 4 HIGH Stack - set to 16 |
| STRICT_ORDER_PC1 | 3 | rwNormal read/write | 0x0 | 1- MC schedules BL4 operations in order received 0 - MC schedules BL4 operations to maximize bandwidth |
| STRICT_ORDER_PC0 | 2 | rwNormal read/write | 0x0 | 1- MC schedules BL4 operations in order received 0 - MC schedules BL4 operations to maximize bandwidth |
| HBM2 | 1 | rwNormal read/write | 0x0 | 1 - HBM 2 memory 0 - HBM2E memory |
| BG_EN | 0 | rwNormal read/write | 0x1 | 1 - Bank Groups are enabled |