REG_PERF_FLT1_CMP_S1 (NOC_NSU) Register

NoC and Integrated Memory Controller NPI Register Reference (AM019)

Document ID
AM019
Release Date
2023-11-17
Revision
1.1

REG_PERF_FLT1_CMP_S1 (NOC_NSU) Register Description

Register NameREG_PERF_FLT1_CMP_S1
Offset Address0x00000001B8
Absolute Address This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507.
Width32
TyperwNormal read/write
Reset Value0x00000000
Descriptionmonitor filter-1 compare value set 1

REG_PERF_FLT1_CMP_S1 (NOC_NSU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
comp_id23:22rwNormal read/write0x0VC Map
vc_map21rwNormal read/write0x0VC Map
src_id_tdest20:9rwNormal read/write0x0SRC-ID for AXI3/4, TDEST for AXI stream
axlock 8rwNormal read/write0x0AxLock
axqos_min 7:4rwNormal read/write0x0min AxQoS
axcache 3:0rwNormal read/write0x0AxCache