eccr0_corr_err_status (DDRMC_MAIN) Register Description
| Register Name | eccr0_corr_err_status |
|---|---|
| Offset Address | 0x00000010BC |
| Absolute Address |
This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507. |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | ECC Correctable Error Status Identifies which burst(s) within a BLn had a correctable ECC error in DDRMC sub-channel 0. |
eccr0_corr_err_status (DDRMC_MAIN) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| corr13 | 7 | rwNormal read/write | 0x0 | ECC group 13 correctable error |
| corr12 | 6 | rwNormal read/write | 0x0 | ECC group 12 correctable error |
| corr11 | 5 | rwNormal read/write | 0x0 | ECC group 11 correctable error |
| corr10 | 4 | rwNormal read/write | 0x0 | ECC group 10 correctable error |
| corr03 | 3 | rwNormal read/write | 0x0 | ECC group 03 correctable error |
| corr02 | 2 | rwNormal read/write | 0x0 | ECC group 02 correctable error |
| corr01 | 1 | rwNormal read/write | 0x0 | ECC group 01 correctable error |
| corr00 | 0 | rwNormal read/write | 0x0 | ECC group 00 correctable error |