REG_PERF_FLT1_CMP_EN (NOC_NMU_HBM2E) Register

NoC and Integrated Memory Controller NPI Register Reference (AM019)

Document ID
AM019
Release Date
2023-11-17
Revision
1.1

REG_PERF_FLT1_CMP_EN (NOC_NMU_HBM2E) Register Description

Register NameREG_PERF_FLT1_CMP_EN
Offset Address0x00000008CC
Absolute Address This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507.
Width32
TyperwNormal read/write
Reset Value0x00000000
Descriptionmonitor filter-1 compare enables

REG_PERF_FLT1_CMP_EN (NOC_NMU_HBM2E) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
dst_id 8rwNormal read/write0x0DST-ID
axlock 7rwNormal read/write0x0AxLock
axcache 5rwNormal read/write0x0AxCache
axprot 4rwNormal read/write0x0AxProt
axburst 3rwNormal read/write0x0AxBurst
axsize 2rwNormal read/write0x0AxSize
axlen 1rwNormal read/write0x0AxLen
axid 0rwNormal read/write0x0AxID