REG_PERF_MON1_BYTE_CNT_LWR (NOC_NSU) Register

NoC and Integrated Memory Controller NPI Register Reference (AM019)

Document ID
AM019
Release Date
2023-11-17
Revision
1.1

REG_PERF_MON1_BYTE_CNT_LWR (NOC_NSU) Register Description

Register NameREG_PERF_MON1_BYTE_CNT_LWR
Offset Address0x0000000234
Absolute Address This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507.
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionMonitor-1 byte count (lower part)

REG_PERF_MON1_BYTE_CNT_LWR (NOC_NSU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
nsu31:0rwNormal read/write0x0Total byte count lower 32-bits