CAL_ERROR_BIT_PHY_NIBBLE_16 (DDRMC_LPDDR4_XRAM) Register Description
| Register Name | CAL_ERROR_BIT_PHY_NIBBLE_16 |
|---|---|
| Offset Address | 0x0000000464 |
| Absolute Address |
This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507. |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x00000000 |
| Description | Calibration Error bit |
CAL_ERROR_BIT_PHY_NIBBLE_16 (DDRMC_LPDDR4_XRAM) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Value | 8:0 | roRead-only | 0x0 | There are 27 registers, each representing a nibble location. Nibbles are numbered 0.26 starting with the first triplet (e.g. nibble 10 represents nibble 0 of the 2nd triplet). Within each nibble location, bit fields 0.5 represent the bit within that nibble and is determined in the pin name. Example: location 0x428 has a value of x003 (b0_0000_0011). 0x424 is the first register location representing nibble 0. 0x428 is the second location representing nibble 1. Bit locations 0 and 1 have 1 meaning pins 0 and 1 in nibble 1 had errors. |